11.5 Machine language
This section is concerned with software at its lowest level – the machine level of 1’s and 0’s. The particular machine language we will examine is the Watson Virtual Machine language.
Let’s begin by reviewing the architecture of the Watson VM and filling in some details that were omitted when the machine was first introduced in Section 11.2. Referring back to Figure 11.1, we see that the Watson VM consists of 256 words of memory together with a CPU that holds sixteen general-purpose registers, a program counter, an instruction register, and various status bits.
The reason why there are only 256 words of memory (labeled 0-255) in this machine is that addresses are limited to exactly eight bits. Thus, the range of valid addresses extends from 0000 0000two to 1111 1111two ( 0 to FFsixteen or 0 to 255ten, when interpreted as unsigned binary numbers). Since the program counter is a special-purpose register that is used to hold the address of the next instruction, its size is limited to eight bits – the width of an address.
The word size used in the Watson VM for both main memory and the general-purpose registers is sixteen bits. This means that the range of values that can be represented by a register or single word of memory is –215 to 215 –1 ( -32,768 to 32,767 ) when using two’s complement notation.
Since a word of memory can hold a program instruction as well as data, the size of each Watson Virtual Machine instruction is sixteen bits. This is also the size of the instruction register located in the CPU. Finally, the status bit registers, as their names imply, are each one bit long.