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12.2.4: Other Gates

Any device, whose operation can be defined in terms of a truth table or Boolean expression, can be implemented using only the fundamental logic gates: and, or, and not. However, a number of additional gates are usually defined, as they prove useful for practical purposes. For example, it is frequently the case that a not will immediately follow an and gate, like so:

Since this is such a common occurrence, the circuit has been given a name ( nand ) and a gate symbol (the and symbol combined with the bubble from the not symbol). Similarly, not often follows or , so there is a nor gate whose symbol is the bubble from the not attached to the or symbol.

Figure 12.9 illustrates both the nand and nor gates. Their behavior, in terms of Boolean expressions, is provided in the figure as well. It is important to remember that these gates are simply a convenience, a kind of “shorthand”, in that they allow a circuit to be constructed from fewer underlying components.

As another example, the basic and and or gates support only two inputs, but a circuit designer will frequently need to and or or more than two inputs. For this reason multi-input and and or gates exist. Figure 12.10 presents the three and four input and and or gates along with their Boolean expressions.

Nand Gate

Nor Gate

Figure 12.9: Nand and nor gates

Figure 12.10: Three and four input and and or gates

While these gates are often quite convenient, remember that it is always possible to construct equivalent circuits from the underlying two-input gates. For example, the circuit:

represents one possible implementation of a four-input or . [1]  The other multi-input gates can be constructed in a similar manner.

In addition to multi-input and and or gates, multi-input nand and nor gates can be constructed. The symbols for these gates are identical to the symbols for the multi-input and and or gates with the exception of a not bubble attached to the output pin of each gate symbol. Their Boolean expressions are also identical to those of Figure 12.10, except that a not bar appears above the right-hand side of the expression.

 

Exercises for Section 12.2.4

  1. Implement a 3-input and using 2-input and gates. 

  2. Develop a complete truth table for the 3-input and gate. 

  3. Implement a 4-input and using 2-input and gates. 

  4. Develop a complete truth table for the 4-input and gate. 

  5. Implement a 3-input or using 2-input or gates. 

  6. Develop a complete truth table for the 3-input or gate. 

  7. Develop a complete truth table for the 4-input or gate. 

  8. Implement a 3-input nand using 2-input and gates and single-input not gates. 

  9. Develop a complete truth table for the 3-input nand gate. 

  10. Implement a 4-input nand using 2-input and gates and single-input not gates. 

  11. Develop a complete truth table for the 4-input nand gate. 

  12. Implement a 3-input nor using 2-input or gates and single-input not gates. 

  13. Develop a complete truth table for the 3-input nor gate. 

  14. Implement a 4-input nor using 2-input or gates and single-input not gates. 

  15. Develop a complete truth table for the 4-input nor gate. 

Footnotes

[1]  The fully-parenthesized Boolean expression for this implementation of the four-input or is

Z = ((A+B)+(C+D)). There are other possible implementations of this gate. For example, the circuit defined by the Boolean expression Z = (((A+B)+C)+D).


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